13:29
D flip flop | Edge Triggered | STLD| Lec-118
1.3K views • 2 weeks ago
16:19
S R Flip flop | Edge triggered | Waveforms | STLD | Lec-117
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13:12
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18:58
SR latch | Gated | Truth Table | STLD | Lec-115
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S R Latch | NAND gate | STLD | Lec-114
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20:17
S R Latch | NOR gate | STLD | Lec-113
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13:03
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18:06
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PLA with PLA table | Example problem | STLD | Lec-109
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15:34
Design using PLA | STLD | Lec-108
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22:39
PAL with PAL table | Example problem | STLD | Lec-107
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15:01
Design using PAL | STLD | Lec-106
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15:21
Programmable Array Logic | PLA, PROM | STLD | Lec-105
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14:59
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20:04
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16:14
Programmable Logic Device | Part-1/2 | STLD | Lec-102
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12:27
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18:35
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11:46
VHDL | Data objects | Signal & File | Part -2/2 | Digital IC Design | Lec-09
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VHDL | Data objects | Constant & Variable | Part -1/2 | Digital IC Design | Lec-08
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